The FPGA generally will have a fixed-hardware loading interface built into it that will pull in the configuration as the FPGA starts up. To configure the FPGA, the configuration is usually stored outside the FPGA in electrically erasable programmable read-only memory (EEPROM) or Flash memory (which is not lost when the power is removed). When you lose power, all that information disappears, and the FPGA reverts to its original state. The information in the LUTs and the routing matrix (that defines the interconnections) is volatile. Routing between such vast numbers of logic blocks is pretty tricky, but fortunately for us, we don’t have to do it-that’s what the design software is for. FPGAs are also often used to prototype an application-specific IC (ASIC) for very large production runs. Taking this idea of some special-purpose areas of the FPGA to its extreme, you find high-end systems-ona-chip (SoC) FPGAs that include fixed high-performance processor cores and memory on a chip that also includes configurable logic cells. There also may be a fixed random access memory (RAM) block for use when the FPGA is to be configured as a processor or just needs to store a lot of data such as in the WAV sound file player example of Chapter 8. The vast bulk of the functional units in the FPGA will be logic blocks, and a typical modern FPGA may have from 200,000 to several million of these blocks. GPIO pins on the FPGA chip are connected to special-purpose input-output (IO) blocks that provide buffered microcontroller-like inputs and outputs that typically can source or sink a few tens of milliamperes. Programming FPGAs: Getting Started with Verilog Figure 2-1 shows a logical view of how all this is arranged. The LUT will often be combined with extra components such as a flip-flop to make an individual logic block. The contents of these LUTs, combined with other routing information, are what give the FPGA its logic. The table can be configured to specify an output value (0 or 1) for every possible combination of the six inputs to the gate. Imagine it as a truth table with six inputs (64 combinations). The lookup table will have a number of inputs, say, six inputs and a single output. The logic blocks that make up an FPGA use a lookup table (LUT). If the evaluation board you are using has built-in LEDs and switches, then these will be permanently connected to certain GPIO logic cells of the FPGA. When the FPGA is being configured, these general-purpose logic cells are connected together using yet more logic gates, and finally, some of the outputs can be connected to special general-purpose input-output (GPIO) cells that allow them to be used as digital inputs or outputs via the physical pins on the FPGA chip’s package. An FPGA is made up of general-purpose logic cells (that have 64 inputs and one output).
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